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Endurance test of RRAM with Keithley 4200 SCS

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ishanvarun
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Endurance test of RRAM with Keithley 4200 SCS

Post by ishanvarun » January 18th, 2017, 3:57 am

I am working on RRAM fabrication. I use Keithley 4200 SCS for I-V measurements but I do not have 4225 PMU card in it. Kindly suggest me how to generate square waves with milliseconds pulse width using Keithley 4200 SCS. Please suggest me any other possible way to perform endurance and retention test on my devices.
In I-V test I usually give -ve voltage to 0V to +ve voltage to 0V to -ve voltage. please suggest how can I give bias in 0V to +ve voltage to 0V -ve voltage to 0V sequence.

Kenneth P
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Re: Endurance test of RRAM with Keithley 4200 SCS

Post by Kenneth P » January 18th, 2017, 12:54 pm

I think the most efficient solution is to develop a UTM and code the SMU to change levels. Timing control will be somewhat inaccurate but you should be able to achieve reasonable results. Set the PLC to 0.01 and use source/delay sequences in a test loop.
If custom automation is not available in case that your 4200-SCS does not have a compiler, there may be a way to perform this test using an ITM with the Repeat Test Execution function. Configure your ITM to use one SMU and the GNDU. You can use an SMU instead of the GNDU if it's set to 0V. The sourcing SMU can be set to List Sweep of four points. The first point is set to 0V, second point to +VE, third is 0V, and the fourth is -VE. In the Timing selection, uncheck the Disable Outputs At Completion function. You test can be configured to exit on compliance.
Note that data is overwritten so you will not see any trend information with this method.
Your best choice is a custom library.

ishanvarun
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Re: Endurance test of RRAM with Keithley 4200 SCS

Post by ishanvarun » February 3rd, 2017, 6:43 am

Thanks Kenneth for your suggestions. The limitation is that I am not much familiar with coding or programming stuff. Please tell me if codes of endurance and retention time measurement can be made available by Keithley or through some other source.
Thanks

Vince W
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Re: Endurance test of RRAM with Keithley 4200 SCS

Post by Vince W » February 3rd, 2017, 7:34 am

We do have ReRam sweep and endurance test examples, but as you noted they require a 4225-PMU, two 4225-RPMs, and two 4200-SMUs in your system. We do not provide custom tests using only SMUs. Do you know your regional Keithley/Tektronix Field Applications Engineer? Your FAE should be able to guide you to the most cost-effective means of making the measurements you need. You can locate them by calling our local technical support # - see http://www.tek.com/support for a local #.
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ishanvarun
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Re: Endurance test of RRAM with Keithley 4200 SCS

Post by ishanvarun » February 18th, 2017, 4:51 am

There are NVM_Examples projects present in the KIUSER folder. Can I use them to execute the endurance and retention time measurement? What are the additional hardware we require to perform these tests? Is PMU 4225 required for this project also? Please resolve the issue.

Vince W
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Re: Endurance test of RRAM with Keithley 4200 SCS

Post by Vince W » February 27th, 2017, 5:32 pm

The NVM_Examples Project in the _MEMORY group includes a ReRam Endurance test.

This requires one 4225-PMU and two 4225-RPMs in your system. You can optionally use two 4200-SMUs for debugging purposes.
The forming pulse for Set and the pulse for Reset use the same timing values. You can specify a rise time to peak followed by a width at peak and the fall time is assumed to be the same as rise time. In addition, specify a delay time before and after set and reset pulses. You can also specify a pulse current limit for Set and Reset.
The graph below shows reset and set pulse voltages (blue) and current (red) vs. time. Note that the set pulse current limit was reached in this example.
RERAM_Pulses.png
RERAM_Pulses.png (70.17 KiB) Viewed 18768 times
In addition to set and reset pulses, additional resistance measurement pulses (usually at lower voltages to avoid changing state) are used to measure device resistance before each reset/set sequence, and after each set and reset pulse.
Finally, the endurance test allows you to define the total number of reset/set sequences and how many of those to measure device resistances.
To determine set (low resistance state) retention, you would monitor the endurance graph. The graph below does not show retention failure, but it is an example of 10e5 cycles measured 25 times - note the log x-axis.
ReRamEndurancePlot.png
ReRamEndurancePlot.png (74.51 KiB) Viewed 18768 times
These are provided as example User Test Modules with the 4200-SCS. They were written in C Language and can be modified or customized, as Ken P had mentioned earlier.
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