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ok, this now may sound like a beginners question, but i havent found the right information about my measurement problem yet:
I have a LVCMOS Clock Signal with 33MHz and 0V/3.3V Swing, so the DC Offset is 1.65V. (a LPC clock...)
Due to an insufficent driver circuit the signal is heavily affected by capacitive loading. Therefore a passive probing with a P6139 + TCA-1MEG (on a DSA70804) causes the system to crash.
This leads me to use a active probe P7240 with only 0.85pF. So far so good, the signal can be measured without influences, but now to my question:
Why are DC levels above the dynamic range not correct. For example on the mentioned clock the high level is displayed just as ~2.5V?
Regarding to the probe specs there is a DC offset tolerance of +-5V with a dynamic range of +-2V.
Do i miss some special configuration on the probe? Or might this be a calibration problem?
The display of the dynamic range borders when connecting the probe to the scope could make me suggest that signal levels are only right when measuring AC coupled within +-2V, but why is then a +-5V DC offset specified?
I hadn't seen the possibility to adjust the DC level yet, since it is located in "Probe Controls" very inconspicuous and i always looked for suitable controls in "Probe Setup"...
I also suggested that DC level does not matter as long as within the +-5V range, but now i think it's clear!
Thank you again!
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