Tektronix Technical Forums are maintained by community involvement. Feel free to post questions or respond to questions by other members. Should you require a time-sensitive answer, please contact your local Tektronix support center here.

TDS540 Clock Trigger Logic??? CTL help

Questions in this forum area are community supported. Tektronix does not regularly monitor posts in this area.
Post Reply
rickrpm
Posts: 2
Joined: May 3rd, 2021, 8:05 pm
Country: United States

TDS540 Clock Trigger Logic??? CTL help

Post by rickrpm » May 3rd, 2021, 8:56 pm

I have a TDS 540 that works! sometimes.

When it works, it works great, but for now it is not running acquisition. It was an intermittent issue which is now turned more permanent.

The scope is alive, all the controls work, you can hear the relays clicking in the attenuator board if you change vertical scale, all the menus are working, display works fine, but there is only a dead trace at the bottom of the screen and its stuck on "Tek: Filling Pretrigger". Of course when it is not working (like now), the Acq diagnostic fails, attn/acq interface and the acq/proc interface fails. and the message is:

SEVERE INTERNAL ERROR diagnostic test failure, acqdataconf, ** addr - 0x7300000 exp data 0x7fff actual = 0x0, *** was testing dig A
SEVERE INTERNAL ERROR diagnostic test failure, DAC range test, ** DAC system failure

I'm not sure the errors mean anything other than the acq board is sleeping. Initially I thought it would be the interface or a broken trace somewhere but I can't find any and have run through most all. The board is in pretty good shape and I changed all the electrolytic capacitors and cleaned it (wasn't too bad looking). The acquisition processor seems to be communicating with the processor (I can hear changing relays in the att board, I can see preamp registers changing values, etc.) I have checked basically all the lines between the bus card and the different chips (yes it took days).

What I have found now is that one of the inputs to the PLL going into the control line for the VCO is dead. I see the 10 MHz crystal input on one side of U504 but the other side (which is supposed to be getting a 10 MHZ input from the CTL/LST) is dead, thus the VCO control line is stuck high (10.9V and the clock running at more than 500 MHZ.) From the VCO I can see the clock input alive going into the CTL (>500MHz), but the ~50 MHz output from CTL to the LST (U1050) is not there, and thus I would suspect that is why the LST is not producing the 10 MHz output for the PLL.

My question is as follows:
Is the CTL supposed to take the 500 MHz VCO input and convert it to 50 MHz no matter what state the scope is in (i.e. any time it has power), in which case with these symptoms we could assume the CTL died?
Or does the CTL need a signal from somewhere else to start or activate the down conversion of the 500 MHz clock? in which case I should be looking elsewhere?

BTW: I can only verify that the signal from the VCO is there with an E-field probe and an spectrum analyzer. I can't really check the quality of the signal of the VCO since my one and only 500 MHz scope is on the bench.

Feel free to let me know if I'm clueless here. Any other thoughts?

albus95
Posts: 6
Joined: April 29th, 2021, 3:47 am
Country: Italy

Re: TDS540 Clock Trigger Logic??? CTL help

Post by albus95 » May 4th, 2021, 12:27 pm

Have you follow the clock diagnostic procedure present in the TDS520 schematic manual? The suppose to check for issue regarding the clock distribution.

Look at those steps it cited some terminator resistor it could be possible that there is a cold solder at on of those? That could explain the problem you are seeing maybe?

rickrpm
Posts: 2
Joined: May 3rd, 2021, 8:05 pm
Country: United States

Re: TDS540 Clock Trigger Logic??? CTL help

Post by rickrpm » May 4th, 2021, 7:43 pm

albus95 wrote:
May 4th, 2021, 12:27 pm
Have you follow the clock diagnostic procedure present in the TDS520 schematic manual? The suppose to check for issue regarding the clock distribution.

Look at those steps it cited some terminator resistor it could be possible that there is a cold solder at on of those? That could explain the problem you are seeing maybe?
Thank you.
Yes, that takes me to "Check and Repair U1001" -

albus95
Posts: 6
Joined: April 29th, 2021, 3:47 am
Country: Italy

Re: TDS540 Clock Trigger Logic??? CTL help

Post by albus95 » May 5th, 2021, 12:28 am

rickrpm wrote:
May 4th, 2021, 7:43 pm
albus95 wrote:
May 4th, 2021, 12:27 pm
Have you follow the clock diagnostic procedure present in the TDS520 schematic manual? The suppose to check for issue regarding the clock distribution.

Look at those steps it cited some terminator resistor it could be possible that there is a cold solder at on of those? That could explain the problem you are seeing maybe?
Thank you.
Yes, that takes me to "Check and Repair U1001" -
Ok so than yeah I would still try to resolder the chip connection, If I recall it's not smd component right?, and than see otherwise the ECL "FPGA" is dead.

Post Reply

Return to “Other or Discontinued Oscilloscopes”

Who is online

Users browsing this forum: No registered users and 2 guests