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The following three questions with you to ask
I have read the document about U.2 electrical test for PCIe Gen3
“Tektronix MOI for Gen3 Tx for U.2 Systems”
“Tektronix MOI for Gen3 Tx for U.2 Add-In Cards”
1. In the “Tektronix MOI for Gen3 Tx for U.2 Systems” text mentioned,
Chapter 6. Using SigTest for Gen 3, the template file must use“U.2_8GB_Host_DUAL_PORT” to test signal integration
But I can’t find the template file with SIGTEST ver.3.1.70 or 4.0.19, could you provide the template file to me for the electrical test?
2. In the “Tektronix MOI for Gen3 Tx for U.2 Add-In Cards” text mentioned,
Chapter 7. Using SigTest for Gen 3, the template file must use“PCIE_3_8GB_CEM” to test signal integration
But the “Figure 17. SIGTEST Application Window” shows that using “U.2_8GB_Device”
My question is, which template file should I use for the add-in card electrical test, PCIE_3_8GB_CEM or U.2_8GB_Device?
If finally the electrical test must use U.2_8GB_Device template file, could you also provide the template file to me?
3. By the way, about the U.2 PCIe Gen1 & Gen2 electrical test, which template file should use?
As below is right?
System: TX_SYS_CON(Gen1) & DUAL_PORT_SYS_CON_225_PAT_CHK (Gen2)
Add-in card: TX_ADD_CON(Gen1) & TX_ADD_CON_3.5DB_PAT_CHK (Gen2)、TX_ADD_CON_6DB_PAT_CHK (Gen2)
Have any update?
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