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MSO5204B EXT REF IN and AUX OUT

MSO54, MSO56, MSO58
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Steve_Digital
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Joined: April 15th, 2019, 11:53 am
Country: United States

MSO5204B EXT REF IN and AUX OUT

Post by Steve_Digital » April 15th, 2019, 1:14 pm

Hi,

I understand the MSO5204B can accept an EXT_REF_IN input to lock its internal clock to an external source.

I would like to understand what the MSO5204B actually does with the EXT_REF_IN? Does it simply pass it straight through to its clock generation circuity? Or does it run it through some sort of cleanup loop first before doing so?

And then for the Auxiliary Output, how is that related to the EXT_REF_IN? If I input a 10MHz to EXT_REF_IN, is the 10MHz from the Auxiliary Output locked to the EXT_REF_IN? Wondering if any more detail can be provided here?

https://www.tek.com/oscilloscope/dpo700 ... mso5000b-0

Thanks.
-Steve

David N
Tektronix Applications
Tektronix Applications
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Joined: July 31st, 2008, 8:26 am

Re: MSO5204B EXT REF IN and AUX OUT

Post by David N » April 23rd, 2019, 10:14 am

The external reference input is conditioned multiple times by the instrument. The single ended input signal is converted to a differential signal and then fed through a PLL-based jitter reducing circuit. After that, the signal is buffered by multiplexer circuit that switches between the external clock reference and the internal clock reference. Next, the clock signal is fanned out through several buffer circuits to the various other circuit in the instrument. Finally, one of the fanned out copies of the reference clock is conditioned through a series of buffer circuits and driven out the AUX OUT BNC connector.

DotTumin
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Joined: September 5th, 2019, 10:38 am
Country: United States

Re: MSO5204B EXT REF IN and AUX OUT

Post by DotTumin » September 5th, 2019, 10:52 am

Hi...first use the XADC to look at the supply voltages and die temperature. This is done through the hardware manager in Vivado, or Ipact in ISE. That will verify the XADC is working correctly.
Then proceed to create your own XADC application (the wizard is best used to create the base verilog or VHDL). Modify the code as needed.

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